name---->TBD-47(字串長度:6)---->趙佑錫(字串長度:9)```hide---->0(字串長度:1)---->0
(字串長度:2)```name2---->(字串長度:0)---->Erick Chao(字串長度:10)```talk_title---->(字串長度:0)---->The Evolution of AI in Chip Design(字串長度:34)```can_playback---->no(字串長度:2)---->yes(字串長度:3)```company---->(字串長度:0)---->Cadence Design Systems(字串長度:22)```position---->(字串長度:0)---->Sr Software Architect (字串長度:22)```company2---->(字串長度:0)---->ML INFRA(字串長度:8)```me_desc---->(字串長度:0)---->With 23 years of extensive experience in IC design, implementation, and EDA development, I have a profound understanding of user requirements and software development in Electronic Design Automation (EDA). My journey in AI/ML began with graduation from the 1st Hsinchu manager class at Taiwan AI Academy (AIA). At the same time, I assumed a role as a ML architect within a top number 1 IC fabless company in Taiwan. Transitioning to Cadence Design Systems, I took the role of leading RD team in both Hsinchu and Shanghai. My perspective is all-encompassing, spanning from that of an adept end-user to that of a contributor to EDA solution development empowered by AI/ML technologies. At present, I am entrusted with the leadership of one of Cerebrus RD teams, a division responsible for the AI-driven production within Cadence Design Systems.(字串長度:842)```talkfile_link---->簡報47(字串長度:8)---->X(字串長度:1)```position_for_agenda---->
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