<ol>
    <li>Cadence Application Engineering Director for Digital Implementation & Signoff Group to support Taiwan customer success in technology and tool application.</li>
    <li>More than 20+ years working experiences in IC Design field with major focus on STA/RC Extraction/IR closure and signoff till 3nm process node.</li>
    <li>In recent years, he supports customer in successfully applying the latest intelligence AI technology for rapid IR design closure to achieve optimized performance in IC design. </li>
</ol>
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