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Intelligent System Design for Optimized IC Design

Time / Place:

⏱️ 09/15 (Fri.) 14:00-14:30 at R3 - 1st Conference Room
(學術活動中心 2 樓) ( Academia Sinica Academic Activities Center )

Biography:

• 黃彥翔 Jason Huang
• Cadence Design Systems / Cadence Application Engineering Director for Digital Implementation & Signoff Group
• 1. Cadence Application Engineering Director for Digital Implementation & Signoff Group to support Taiwan customer success in technology and tool application.
  2. More than 20+ years working experiences in IC Design field with major focus on STA/RC Extraction/IR closure and signoff till 3nm process node.
  3. In recent years, he supports customer in successfully applying the latest intelligence AI technology for rapid IR design closure to achieve optimized performance in IC design.